This invention relates to a microcomputer capable of refreshing an external memory.
A microcomputer may comprise a refresh pulse producing circuit for controllably producing refresh pulses for use in refreshing an external memory which may be either a pseudo-static random access memory or a dynamic random access memory. It is known that such an external memory has refresh and non-refresh memory areas where the external memory should be refreshed at a refresh cycle and need not be refreshed, respectively.
In the manner which will later be described more in detail, the refresh pulse producing circuit comprises a refresh control circuit for successively producing refresh pulses at the refresh cycle. An allow signal register or flag produces a refresh allow signal which becomes active and inactive when the external memory should and should not be refreshed.
Although so named, the refresh pulse producing circuit is used in addition for having access to the external memory. The refresh pulse producing circuit therefore comprises a bus control circuit for supplying the external memory with an access signal indicative of access to the external memory. More particularly, the bus control circuit produces the access signal when the refresh pulse producing circuit carries out memory access to the external memory, namely, either when a program should be fetched from the external memory or when data should be read from or written in the external memory.
When the refresh pulse producing circuit of a conventional microcomputer is used, the memory access is put in a waiting state whenever collision takes place between production of the access signal and the refresh cycle while the refresh allow signal is active. This objectionably reduces the speed of operation of the microcomputer.